1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device such as a ferroelectric memory using a ferroelectric capacitor, for instance.
2. Description of the Related Art
Recently, a ferroelectric memory including a ferroelectric capacitor whose capacitor insulation film is made of ferroelectric materials has received attention.
Using a hysteresis characteristic that is one of characteristics of a ferroelectric, the ferroelectric memory stores two data items in a nonvolatile manner according to the level of two different residual polarizations. For example, a memory which consists of series connected memory cells each having a transistor having a source terminal and a drain terminal and a ferroelectric capacitor inbetween the two terminals, hereafter named “Series connected TC unit type ferroelectric RAM” is known. Such a ferroelectric memory is disclosed in, for example, D. takashima et al., “High-density Chain Ferroelectric Random Memory (CFRAM),” Processing VLSI Symposium, 1997, pp. 83-84.
The prior art ferroelectric memory is however likely to increase in chip size. The ferroelectric memory holds data according to the level of residual polarization, unlike a DRAM (dynamic random access memory). It is thus necessary to drive a plate line when data is read out. In the prior art ferroelectric memory, however, a plate line driver occupies a large area in a semiconductor chip and thus the chip is difficult to decrease in size.